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 Session Numbers
1A Advanced Caching and In-Memory Processing
1B Camouflaging and Logic Encryption
1C Improving Manufacturability -- From Design through Mask Generation
1D Cross-Layer Efforts for Combating Computationally Hard Problems
1W Hardware and Algorithms for Learning On-a-Chip (HALO)
2A Modern Techniques for Challenging Verification Problems
2B Physical Attacks: Implementation, Simulation, and Synthesis
2C 3D Integration Beyond TSVs
2D AI for CPS: Machine Learning for Intelligent and Secure Cyber-Physical Systems
2W International Workshop on Design Automation for Analog and Mixed-Signal Circuits
3A New Advances in Circuit Simulation
3B Intelligent Control on Wheels
3C Next Generation System Level Design Methods
3D 2017 CAD Contest at ICCAD
3W 10th IEEE/ACM Workshop on Variability, Modeling, and Characterization (VMC)
4A Synthesis, Layout, and Crosspoint -- Oh My!
4B System Designs with Emerging Memory Technologies
4C Towards Building Next Generation Embedded Software and Systems
4D Where Are the True Innovations and Potentials of IoT?
4W Design Automation for Quantum Computers
5A Split Manufacturing
5B Exploring Intricate Gate Level Optimization Trade-offs
5C X-learning for IoT
5D New Directions in Secure Validation and Attestation
5W EDA/CAD in the IoT eHealth Era: From Devices to Architectures, Applications, and Data Analytics
6A Novel Frameworks and Optimizations in Hardware Synthesis
6B New Advances in Approximate Computing and Neural Network Implementations
6C Power and Thermal Management for Cool Chips
6D FPGA CAD: Emerging Challenges and Solutions
6W Workshop on Non-conventional Approaches to Hard Optimization (NAHO)
7A Taming Routability with Improved Placement
7B X Marks the Spot: Computing and Crossbars
7C Cross-layer Dependability of Medical CPS
7D Automotive EDA: Constructing the Intersection of Silicon Valley and Motor City
8A Advanced Routing Across Different Application Domains
8B Right Timing for Power!
8C Biochips, Neuromorphic and Stochastic Computing
8D Predictive Process Design Kit (PDK) to Accelerate Academic Research in VLSI Design and CAD
9A Errors are Evil: Design for Reliability!
9B Application Mapping and Estimation Methods for Heterogeneous Platforms
9C HDSLs: Domain Specific Languages for Hardware and SoC Design
9D Critical Infrastructure Safety and Security - Challenges and Research Opportunities
10A Counteracting and Preventing Hardware Trojans
10B Next Generation System Level Technologies
10C Frameworks and Methodologies for Heterogeneous Computing
10D Emerging Design Methodologies for Analog/RF/Mixed-Signal Circuits and Systems